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Thomas Sordel

Conception and validation of a silicon “patch-clamp chip” dedicated to parallelized and automated electrical measurements on individual living cells

Published on 22 November 2006
Thesis presented November 22, 2006

Abstract:
Planar patch-clamp, a method to measure ionic currents by using on-planar substrate structured microholes, allows parallelizing measurements as needed by pharmaceutical companies. First, we have made a device allowing us to test our silicon chip and to demonstrate its ability to record ionic currents. Then, we have made improvements to the chip performances and sensitivity by optimizing the interaction of living cells with geometrical and physico-chemical parameters of the chip and by decreasing the chip capacitance. Thanks to this method, we have designed a chip leading to more than 80 % of usable seals and electrophysiological experiment​s presented in this study reveal the robustness, the reliability and the sensitivity of the device.

Keywords:
Planar patch-clamp, silicon chip, cell/microhole interaction, multiparametric study, parallelization, automation, potassium channels (IRK1, BK(Ca), hERG)

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